Muhammad Khellah

A 45 nm Resilient Microprocessor Core for Dynamic Variation Tolerance

Keith Bowman, James Tschanz, Shih‐Lien L. Lu et al. · IEEE Journal of Solid-State Circuits · 2010 · 259 citations

Engineering, Vlsi Design, Microprocessor Core +20

Trading off Cache Capacity for Reliability to Enable Low Voltage Operation

Chris Wilkerson, Hongliang Gao, Alaa R. Alameldeen et al. · 2008 · 243 citations

Engineering, Vlsi Design, Energy Efficiency +22

A 0.45–1 V Fully-Integrated Distributed Switched Capacitor DC-DC Converter With High Density MIM Capacitor in 22 nm Tri-Gate CMOS

Rinkle Jain, Bibiche Geuskens, Stephen T. Kim et al. · IEEE Journal of Solid-State Circuits · 2014 · 94 citations

Low-power Electronics, Electrical Engineering, Engineering +12

Wordline & Bitline Pulsing Schemes for Improving SRAM Cell Stability in Low-Vcc 65nm CMOS Designs

Muhammad Khellah, Y. Ye, N. Kim et al. · 2006 · 85 citations

Electrical Engineering, Engineering, Vlsi Design +13

2 GHz 2 Mb 2T Gain Cell Memory Macro With 128 GBytes/sec Bandwidth in a 65 nm Logic Process Technology

Dinesh Somasekhar, Yibin Ye, Paolo Aseron et al. · IEEE Journal of Solid-State Circuits · 2009 · 85 citations

Electrical Engineering, Memory Architecture, Engineering +12