2007 · 192 citations · 4 references
EngineeringComputer EngineeringElectrical EngineeringMicroelectronicsSemiconductor DevicesVlsi DesignCmos Circuit DesignLeakage Power ReductionMemory DevicesMemory Subsystem DesignSubthreshold Circuit DesignTransistor BiasingSense Amplifier DesignSubthreshold Leakage ReductionSubthreshold Operation
A 65nm 256kb 8T SRAM operates in sub-V, at 350mV. Peripheral assists eliminate sub-V, bitline leakage without limiting read current, and for a given area, sense-amplifier redundancy reduces read errors from offsets by a factor of five compared with device upsizing.
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A 256kb Sub-threshold SRAM in 65nm CMOS
Benton H. Calhoun, Anantha P. Chandrakasan · 2006 · 231 citations
Engineering, Computer Engineering, Electrical Engineering +17