IEEE Embedded Systems Letters · 2009 · 17 citations · 8 references
EngineeringComputer EngineeringElectrical EngineeringEmbedded SystemsField-programmable Gate ArraysMicroelectronicsDelay ModelingDigital InstrumentationField-programmable Gate Array ArchitectureTime MeasurementTiming AnalysisTiming ModelingDiscretizationFlip-flop DesignLatch DesignSignal PropagationSignal Propagation DelayTime Interval MeasurementTime ResolutionTiming Architecture
Measuring the duration of a time interval is a discretization process in which an input signal is sampled at discrete time steps. Most digital systems generate these time steps by active components, such as a generator, flip-flops, dedicated delay elements, gates, inverters, and the like, whose signal propagation time determine the system's resolution. This paper presents a new time-interval measurement architecture, called BOUNCE, in which the delays are realized by the simplest elements possible: the (metal) wires between the logic elements within the chip. Standard RS latches serve as the sampling units. Even though the requirements with respect to setup and hold times of these latches are not met, the architecture operates quite reliably: on an Altera Stratix II field-programmable gate array, BOUNCE yields a time resolution better than 4 ps. Due to its architecture, BOUNCE is ideally suited to be implemented on field-programmable gate arrays and can thus be realized as an embedded system on its own or as part of an existing one.
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