Timing Architecture
Timing Architecture is a formal computational framework within field-programmable gate array architecture that specifies the structural and operational principles governing signal propagation delays and clocking mechanisms to ensure precise temporal coordination of logic elements and interconnects.
116
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4.6K
Citations
474
Authors
167
Institutions
Publications per year
2017–2026
21
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Flow-through latch and edge-triggered flip-flop hybrid elements
H. Partovi, R. Burd, Umer Salim et al. · 2002 · 308 citations
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European Organization for Nuclear Research
Geneva, Switzerland
6 h-index
11 publications
331 citations
University of Southern California
Los Angeles, United States
4 h-index
12 publications
546 citations
GSI Helmholtz Centre for Heavy Ion Research
Darmstadt, Germany
4 h-index
27 publications
989 citations
University of Science and Technology of China
Hefei, China
3 h-index
13 publications
1K citations
Northeastern University
Boston, United States
3 h-index
9 publications
1K citations

Centre National de la Recherche Scientifique
Paris, France
3 h-index
6 publications
92 citations
Columbia University
New York, United States
2 h-index
4 publications
110 citations

University of Coimbra
Coimbra, Portugal
2 h-index
7 publications
90 citations
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9 publications · 341 citations
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8 publications · 805 citations
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7 publications · 168 citations
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4 publications · 155 citations
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JINST · 4 publications · 122 citations
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