Comparison of lateral and vertical DMOS specific on-resistance

Abstract

The specific on-resistance characteristics of the lateral and vertical DMOS transistors are compared for voltages between 50 and 800 volts. The vertical DMOS transistor's breakdown and on-resistance relationship is reviewed, followed by modeling results of the lateral DMOS transistor's breakdown and on-resistance characteristics. A direct comparison is then made between the vertical and lateral devices. The results indicate that the vertical device has lower specific on-resistance at low voltages because of its higher channel width/unit chip area packing. At higher voltages, the lateral device becomes equal to or better than the vertical device because of its ability to maintain a high drift region conductivity.