Publication | Closed Access
Defect generation in trench isolation
10
Citations
5
References
1984
Year
Unknown Venue
Electrical EngineeringBuried Structure EngineeringEngineeringDefect GenerationTrench Isolation ProcessMicrofabricationStress-induced Leakage CurrentApplied PhysicsSealed Sidewall TrenchElectronic PackagingUnderground ConstructionDefect TolerancePlasma EtchingSilicon On InsulatorSilicon DebuggingMicroelectronics
Defect generation in silicon during trench isolation process has been studied. Several sources of defect generation have been identified using Secco etching. These include contamination from the redeposited oxide layer during the trench etch and the stress induced at trench corners during the trench cap and field oxidation. A Sealed Sidewall Trench (SST) isolation process has been developed which results in defect-free trench isolation structures. A key addition to the refill dielectrics in SST is the incorporation of nitride layer(s) for inhibiting excessive vertical bird's beaking.
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