2004 · 13 citations · 5 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureMicroelectronicsLow-power Cache DesignMemory Hierarchy DesignMemory Hierarchy OptimizationMulticore Processor DesignPhysical Design3D Integrated CircuitsManufacturingMemory Access LatencyMemory Footprint ReductionRandom-access MemoryStreaming Multiprocessor DesignThree-dimensional Integrated Circuit LayoutWafer-level Packaging
The performance of both 2D and 3D implementations of a streaming video processor is presented incorporating 130 nm technology node parameters. The reduced memory access time predicted for the 4 MB L2 cache (0.9 ns for 3D and 1.65 ns for 2D) is indicative of performance advantages projected for 3D implementations of memory-intensive architectures.
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