Payman Zarkesh-Ha - Concepedia

Author

Payman Zarkesh-Ha

Georgia Institute of Technology ORCID

Also Known As

P. Zarkesh-Ha, Payman Zarkesh-Ha, Zarkesh-Ha, Payman

169

Publications

1.5K

Citations

H-Index

131

Concepts

All Affiliations

Georgia Institute of Technology University of New Mexico Rensselaer Polytechnic Institute

About

Payman Zarkesh-Ha is an author at Georgia Institute of Technology specializing in engineering, computer engineering, and computer architecture.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	21	36	1.2K
2	Medicine	2	2	31
3	Health Sciences	1	1	21
4	Management	1	1	13
5	Natural Sciences	1	1	50

Payman Zarkesh-Ha

Publications

1.2K

Citations

H-Index

Page 1

	Year	Citations
Interconnect opportunities for gigascale integration J.D. Meindl, Jeffrey A. Davis, Payman Zarkesh-Ha, IBM Journal of Research and Development Semiconductor TechnologyElectrical EngineeringPhysical Design (Electronics)EngineeringVlsi Design	2002	179
Impact of three-dimensional architectures on interconnects in gigascale integration J.W. Joyner, Payman Zarkesh-Ha, Jeffrey A. Davis, IEEE Transactions on Very Large Scale Integration (VLSI) Systems Variable SeparationInterstratal InterconnectsElectrical EngineeringWafer Scale ProcessingEngineering	2001	90
Prediction of net-length distribution for global interconnects in a heterogeneous system-on-a-chip Payman Zarkesh-Ha, Jeffrey A. Davis, J.D. Meindl IEEE Transactions on Very Large Scale Integration (VLSI) Systems EngineeringComputer ArchitectureNetwork AnalysisInterconnection Network ArchitectureGlobal Wires	2000	82
Characterization and modeling of clock skew with process variations Payman Zarkesh-Ha, T. Mule, J.D. Meindl Electrical EngineeringPhysical Design (Electronics)EngineeringVlsi DesignMeasurement	2003	76
A stochastic global net-length distribution for a three-dimensional system-on-a-chip (3D-SoC) J.W. Joyner, Payman Zarkesh-Ha, J.D. Meindl EngineeringComputer ArchitectureInterconnection Network ArchitecturePhysical Design (Electronics)Systems Engineering	2002	61
Global interconnect design in a three-dimensional system-on-a-chip J.W. Joyner, Payman Zarkesh-Ha, J.D. Meindl IEEE Transactions on Very Large Scale Integration (VLSI) Systems Global Interconnect DesignElectrical EngineeringPhysical Design (Electronics)EngineeringAdvanced Packaging (Semiconductors)	2004	53
A three-dimensional stochastic wire-length distribution for variable separation of strata J.W. Joyner, Payman Zarkesh-Ha, Jeffrey A. Davis, EngineeringVlsi DesignComputer ArchitectureStochastic AnalysisHomogeneous Gigascale	2002	50
Interconnecting device opportunities for gigascale integration (GSI) J.D. Meindl, Jeffrey A. Davis, J.W. Joyner, EngineeringDevice IntegrationComputer ArchitectureReverse ScalingEnergy Dissipation	2002	38
Prediction of interconnect fan-out distribution using Rent's rule Payman Zarkesh-Ha, Jeffrey A. Davis, William Loh, Electrical EngineeringEngineeringRule ShareSmart GridEnergy Management	2000	37
A compact physical via blockage model Qiang Chen, Jeffrey A. Davis, Payman Zarkesh-Ha, IEEE Transactions on Very Large Scale Integration (VLSI) Systems Numerical AnalysisEngineeringComputer ArchitectureInterconnection Network ArchitectureComputational Mechanics	2000	30

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