IEEE Microwave and Wireless Components Letters · 2007 · 10 citations · 16 references
EngineeringElectrical EngineeringMicroelectronicsSemiconductor DevicesSystem-on-chip DesignCmos Circuit DesignCoupled CircuitsIntegrated Circuit DesignIntegrated Circuit DevicesRadio-frequency Integrated CircuitsVery-large-scale Integration LayoutInductance MeasurementInductor DesignInductorsMutual InductanceMutual Inductance EffectsRadio-frequency Integrated Circuit DesignRf Cmos DesignSelf-inductance
<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> This study proposes a proper layout of on-chip inductors to diminish the coupling effect in silicon-based technology. Keeping self inductance constant, the mutual inductance is measured to characterize coupling effect in three test keys. A layout with variable metal width of inductor is found to alleviate mutual inductance. Experiment results demonstrate the mutual inductance decreases 33.5% compared with standard layout. This information will be helpful in implementation of more than one inductor into radio frequency integrated circuits (RFICs). </para>
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