2002 · 37 citations · 8 references
EngineeringComputer EngineeringElectrical EngineeringComputer ArchitectureLow-power DesignSystem-on-chip DesignDynamic Power ReductionMulti-voltage DesignParallel ArchitecturesPower ManagementPower OptimizationPower-aware DesignEnergy-efficient ArchitectureLow-power MicroarchitectureMicroarchitectural Power ReductionPower Management TechniquesPower-aware Hardware ArchitecturePower-aware MicroarchitecturePower-efficient ArchitecturePower-efficient Design
Multichip modules permit highly efficient implementation of tiled architectures. If the tiles are implemented in submicron CMOS, extremely highly computation rates can be achieved, but power dissipation becomes the principal factor limiting achievable levels of integration and performance. Some examples of tiled architectures are described. The feasibility and advantages of reduced voltage operation for reducing energy per operation in power constrained environments are discussed.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
8