Concepedia

Power-aware Microarchitecture

Power-Aware Microarchitecture is a processor microarchitecture designed with mechanisms to explicitly manage and optimize power consumption while maintaining performance, distinguished from conventional microarchitectures by its integration of power-aware design principles and dynamic power control techniques.

494

Publications

27.4K

Citations

1.6K

Authors

331

Institutions

Publications per year

2017–2026

77

Parents

Publications

494

Dynamic thermal management for high-performance microprocessors

David Brooks, Margaret Martonosi · 2002 · 889 citations

, , +17

Orion: a power-performance simulator for interconnection networks

Hangsheng Wang, Xinping Zhu, Li-Shiuan Peh et al. · 2002 · 681 citations

, , +17

Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction

2003 · 677 citations

, , +17

An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget

Canturk Isci, Alper Buyuktosunoglu, Pradip Bose et al. · Proceedings of the ... annual International Symposium on Microarchitecture/Proceedings of the annual International Symposium on Microarchitecture · 2006 · 623 citations

, , +17

Power-aware microarchitecture: design and modeling challenges for next-generation microprocessors

Peter W. Cook, Manoj Gupta, Victor Zyuban et al. · IEEE Micro · 2000 · 506 citations

, , +17

1–5 of 494

Authors

1.6K

  1. DB
    David Brooks

    Harvard University Press, United States

    14 publications · 2.2K citations

    14

    h-index

  2. AB
    Alper Buyuktosunoglu

    IBM (United States), United States

    13 publications · 2K citations

    13

    h-index

  3. DM
    Diana Marculescu

    Carnegie Mellon University, United States

    13 publications · 640 citations

    13

    h-index

  4. MK
    Mahmut Kandemir

    Pennsylvania State University, United States

    15 publications · 736 citations

    13

    h-index

  5. PB
    Pradip Bose

    IBM Research - Thomas J. Watson Research Center, United States

    14 publications · 2.1K citations

    13

    h-index

1–5 of 1.6K

Institutions

331

  1. Intel (United States)

    Santa Clara, United States

    25 h-index

    183 publications

    12.2K citations

  2. IBM Research - Thomas J. Watson Research Center

    Yorktown Heights, United States

    18 h-index

    78 publications

    11K citations

  3. IBM (United States)

    Armonk, United States

    17 h-index

    94 publications

    7.3K citations

  4. Pennsylvania State University

    State College, United States

    15 h-index

    89 publications

    4K citations

  5. Carnegie Mellon University

    Pittsburgh, United States

    14 h-index

    31 publications

    1.5K citations

  6. The University of Texas at Austin

    Austin, United States

    12 h-index

    31 publications

    875 citations

  7. University of California San Diego

    San Diego, United States

    12 h-index

    61 publications

    7.4K citations

  8. Georgia Institute of Technology

    Atlanta, United States

    11 h-index

    32 publications

    1.1K citations

1–8 of 331

Venues

  1. IEEE Micro

    21 publications · 1.8K citations

    16

    h-index

  2. 15

    h-index

  3. IEEE Journal of Solid-State Circuits

    13 publications · 757 citations

    13

    h-index

  4. ACM SIGARCH Computer Architecture News

    12 publications · 630 citations

    11

    h-index

  5. IEEE Transactions on Computers

    10 publications · 383 citations

    10

    h-index

1–5