Subnanosecond self-aligned I²L/MTL circuits

Abstract

A self-aligned I <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> L/MTL technology featuring collectors doped from and contacted by polysilicon, self-aligned collector and base contact edges, and metal-interconnected bases is described. Experimental ring-oscillator circuits designed with 2.5-µm design rules and fabricated with this technology exhibit gate delays as small as 0.8 ns at <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I_{c} = 100</tex> µA for fan-in = 1 and fan-out = 3. Increased wiring flexibility and improved circuit density are inherent advantages of this self-aligned technology.