Radiation-Induced Soft Error Rates of Advanced CMOS Bulk Devices

TLDR

The study summarizes radiation‑induced soft error rate scaling trends in key CMOS bulk devices and introduces a novel method for extracting one‑dimensional cross sections of collected charge distributions from multi‑bit statistics. The authors analyzed SER per‑bit scaling trends of SRAMs, sequential, and static combinational logic, and developed a technique to derive one‑dimensional cross sections of collected charge distributions from measured multi‑bit statistics. Results show that for SRAMs the single‑bit SER decreases while multi‑bit SER rises sharply, whereas for logic devices the total SER remains unchanged but susceptibility to alpha particles has increased.

Abstract

This work provides a comprehensive summary of radiation-induced soft error rate (SER) scaling trends of key CMOS bulk devices. Specifically we analyzed the SER per bit scaling trends of SRAMs, sequentials and static combinational logic. Our results show that for SRAMs the single-bit soft error rate continues to decrease whereas the multi-bit SER increases dramatically. While the total soft error rate of logic devices (sequentials and static combinational devices) has not changed significantly, a substantial increase in the susceptibility to alpha particles is observed. Finally, a novel methodology to extract one-dimensional cross sections of the collected charge distributions from measured multi-bit statistics is introduced