Proceedings of the IEEE · 1969 · 11 citations · 0 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureLogicDelay ModelingDigital Logic DesignHardware Modeling For Digital SystemsPropagation DelayTiming AnalysisTiming ModelingBlack Box ModelingCircuit Delay ModelingDelay EffectsGate Delay ModelingLogic Block DecompositionLogic Block DesignLogic Gate NetworksPropagation Delay Modeling
This letter presents a basic approach to the modeling of logic building blocks for the use at speeds at which delay effects cannot be neglected. An idealized logic block is followed by a delay-producing and waveshaping "black box." A hierarchy of increasing levels of complexity is conceivable for this black box.