Concepedia

Logic Block Decomposition

Logic Block Decomposition is a configurable logic block design methodology that partitions complex logic functions into smaller, interoperable sub-blocks to optimize resource utilization and routing efficiency within field-programmable gate arrays.

99

Publications

3.7K

Citations

212

Authors

81

Institutions

Publications per year

2017–2026

13

Parents

Publications

99

Built-in logic block observation techniques

B. Koenemann · Medical Entomology and Zoology · 1979 · 445 citations

, , +7

Architecture of field-programmable gate arrays

Jonathan Rose, Abbas El Gamal, Alberto Sangiovanni‐Vincentelli · Proceedings of the IEEE · 1993 · 325 citations

, , +17

An Introduction to Array Logic

H. Fleisher, L. I. Maissel · IBM Journal of Research and Development · 1975 · 188 citations

, , +14

A General Decomposition for Reversible Logic

Marek Perkowski, L. Jóźwiak, Paweł Kerntopf et al. · TU/e Research Portal · 2001 · 173 citations · Full text

, , +16

An application of functional decomposition in ROM-based FSM implementation in FPGA devices

Mariusz Rawski, Henry Selvaraj, Tadeusz Łuba · Journal of Systems Architecture · 2004 · 92 citations

, , +17

1–5 of 99

Authors

212

  1. DK
    Dariusz Kania

    Silesian University of Technology, Poland

    11 publications · 297 citations

    11

    h-index

  2. LJ
    L. Jóźwiak

    Eindhoven University of Technology, Netherlands

    8 publications · 323 citations

    8

    h-index

  3. MR
    Mariusz Rawski

    Warsaw University of Technology, Poland

    6 publications · 202 citations

    6

    h-index

  4. MK
    Marcin Kubica

    Silesian University of Technology, Poland

    5 publications · 127 citations

    5

    h-index

  5. AM
    Alan Mishchenko

    University of California, Berkeley, United States

    4 publications · 264 citations

    4

    h-index

1–5 of 212

Institutions

81

  1. Silesian University of Technology

    Gliwice, Poland

    11 h-index

    18 publications

    431 citations

  2. Warsaw University of Technology

    Warsaw, Poland

    9 h-index

    18 publications

    471 citations

  3. Eindhoven University of Technology

    Eindhoven, The Netherlands

    7 h-index

    13 publications

    246 citations

  4. University of California, Los Angeles

    Los Angeles, United States

    5 h-index

    12 publications

    325 citations

  5. University of California, Berkeley

    Berkeley, United States

    5 h-index

    10 publications

    529 citations

  6. University of Bielsko-Biała

    Bielsko-Biala, Poland

    5 h-index

    5 publications

    127 citations

  7. Intel (United States)

    Santa Clara, United States

    4 h-index

    4 publications

    173 citations

  8. University of Toronto

    Toronto, Canada

    4 h-index

    10 publications

    772 citations

1–8 of 81

Venues

  1. 5

    h-index

  2. Proceedings of the IEEE

    3 publications · 364 citations

    3

    h-index

  3. Computers & Operations Research

    3 publications · 83 citations

    3

    h-index

  4. ACM Transactions on Design Automation of Electronic Systems

    TODAES · 3 publications · 113 citations

    3

    h-index

  5. VLSI design

    2 publications · 65 citations

    2

    h-index

1–5