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Sputter‐Etching Planarization for Multilevel Metallization
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1983
Year
Materials ScienceComputer SimulationEngineeringBeam LithographyMicrofabricationMaterials FabricationSurface ScienceApplied PhysicsMultilevel MetallizationSemiconductor Device FabricationThin FilmsSilicon On InsulatorPlasma EtchingNanolithography MethodMicrostructureArgon Gas
A simple process of sputter‐etching planarization was developed for multilevel metallization, which utilized an angular dependence of sputter yield. Silicon nitride and phosphosilicate glass as interlevel insulators were planarized to a slope angle of 45° by using rf sputter etching with an argon gas. The surface topology was well predicted by computer simulation. The sputter‐etching planarization was successfully applied to three‐level metallization, resulting in very high yields of interconnection continuity, interlevel insulation, and via holes.