Fabrication of High-Mobility Nitrided Hafnium Silicate Gate Dielectrics with Sub-1-nm Equivalent Oxide Thickness Using Plasma Nitridation and High-Temperature Postnitridation Annealing

Abstract

Changes in optical thickness and equivalent oxide thickness (EOT) during postdeposition annealing (PDA) and postnitridation annealing (PNA) were investigated to fabricate sub-1-nm-EOT nitrided hafnium silicate (HfSiON) gate dielectrics. In spite of optical thickness reductions by PDA, none of the PDA conditions could reduce the EOT and bring about the merit in leakage current reduction. On the other hand, high-temperature PNA without oxygen was found to be effective for reducing both optical thickness and EOT. Furthermore, leakage current reduction ratio and effective mobility were improved by applying high-temperature PNA. Consequently, the fabrication of 0.81-nm-EOT HfSiON gate dielectrics with a gate leakage current of 0.74 A/cm2 at 0.7 V and an electron mobility of 235 cm2/(V s) at 0.8 MV/cm (76% of SiO2) has been realized.