A Novel Low Leakage Current VPT(Vertical Pillar Transistor) Integration for 4F2 DRAM Cell Array with sub 40 nm Technology

Jae-Man Yoon, Kang‐Yoon Lee, Seungbae Park, Seong-Goo Kim, Hyoung-won Seo, Youngwoong Son, BongSoo Kim, Hyun-Woo Chung, Choong-Ho Lee, Wonsok Lee,

2006 · 14 citations · 0 references

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