Electrical properties of 0.5 nm thick Hf-silicate top-layer∕HfO2 gate dielectrics by atomic layer deposition

Abstract

The electrical properties have been studied for hafnium (Hf)-based gate stack structures, fabricated using atomic layer deposition (ALD) technology. The very thin ALD Hf-silicate layers on the top of HfO2 gate structures were very important in obtaining good electrical properties, because these surface films prevented a reaction between the polysilicon electrodes and HfO2 films during high temperature activation annealing. From subthreshold characteristic measurements, Ioff values were less than about 10pA∕μm and Ion values at ∣Vg∣=1.1V were greater than 350 and 120μA∕μm for n- and p- metal oxide semiconductor field effect transistors, respectively. The effective mobility curves for the Hf-based gate stack structures were at the same level as those of 1.6 nm SiON reference films at 0.8MV∕cm. Furthermore, the interfacial trap densities were less than 5*1010cm−2 for the Hf-based gate stack structures, achieving the same level as in the 1.6 nm SiON reference films.