The Efficacy of Metal-Interfacial Layer-Semiconductor Source/Drain Structure on Sub-10-nm n-Type Ge FinFET Performances

Abstract

We investigate the impact of metal-interfacial layer-semiconductor source/drain (M-I-S S/D) structure with heavily doped n-type interfacial layer (n <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> -IL) or with undoped IL on sub-10-nm n-type germanium (Ge) FinFET device performance using 3-D TCAD simulations. Compared to the metal- semiconductor S/D structure, the M-I-S S/D structures provide much lower contact resistivity. Especially, the M-I-S S/D structure with n <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> -IL provides much lower contact resistivity, resulting in ~5× lower contact resistivity than 1×10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-8</sup> Ω-cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , specified in International Technology Roadmap for Semiconductors. In addition, we found that the M-I-S structure with n <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> -IL remarkably suppresses the sensitivity of contact resistivity to S/D doping concentration.