Publication | Closed Access
Fast Programmable 256K Read Only Memory with On-Chip Test Circuits
11
Citations
8
References
1985
Year
Non-volatile MemoryEngineeringVlsi DesignMem TestingComputer ArchitectureMulti-channel Memory ArchitectureHardware SecurityX 8Fast Programmable 256KParallel ComputingBits EpromFast Programming TimeElectrical EngineeringFlash MemoryComputer EngineeringComputer ScienceMicroelectronicsMemory ArchitectureVlsi ArchitectureParallel Programming
A 32K X 8 bits EPROM which satisfies all requirements for a high-density EPROM, has been developed. The fast programming time is achieved by introducing a DSA structure into the memory cell. The low power consumption and fast access time are realized by utilizing n-well CMOS peripheral circuits. Various test circuits are implemented to alleviate lengthy screening time. Typical programming time, access time, and power dissipation are 3/spl mu/byte, 100 ns, and 5 mA, respectively.
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