Evolution of VLSI Reliability Engineering

Abstract

Projection indicates that by the turn of the century microcomputer chips will have 100 million transistors and failure rates of less than 10 FIT. Traditional accelerated product life tests and wafer-level reliability measurement techniques presently being developed will have severe limitations in resolving the 10 FIT failure rate of complex VLSI circuits. These limitations are discussed, along with the change in direction that the reliability engineering and manufacturing community will have to take over the next decade to meet the challenge of continuously decreasing failure rate goals. >