GaN-on-insulator technology for high-temperature electronics beyond 400 °C

TLDR

InAlN/GaN high‑electron‑mobility transistors have been fabricated in a silicon‑on‑insulator‑like configuration, enabling lattice‑matched device structures. The devices employ a 50‑nm GaN channel on a 50‑nm AlN nucleation layer on sapphire, with mesa‑etched active areas that produce semi‑enhancement‑mode characteristics. Device performance remains within ~10 % of room‑temperature values up to 600 °C, with the drain current, threshold voltage, and 1 MHz large‑signal operation largely unchanged, though the on/off ratio falls from 10¹⁰ to 10⁶ due to defect activation, suggesting that ultrathin GaN‑on‑sapphire technology can extend high‑temperature operation beyond current limits with minimal performance loss.

Abstract

Lattice-matched InAlN/GaN high electron mobility transistors (HEMTs) have been prepared in a silicon-on-insulator (SOI)-like configuration. Here, this implies an ultrathin body 50 nm GaN channel/50 nm AlN nucleation layer material structure on sapphire with the active areas confined by mesa etching, resulting in semi-enhancement mode device characteristics. In contrast to conventional technologies, the device characteristics (maximum drain current, threshold voltage and 1 MHz large signal operation) change only within less than approx. 10% up to 600 °C compared to room temperature (RT). The current on/off ratio decreases from 1010 at RT to 106 at 600 °C, due to residual defect activation. These first results of ultrathin body GaN-on-sapphire-based materials and device technology may indicate that essential improvements in the temperature-handling capability of electronic device structures beyond what is common at present may be possible with only limited sacrifice of device performance.