Latchup performance of retrograde and conventional n-well CMOS technologies

Abstract

The static and transient latchup performance of conventional and retrograde n-well CMOS technologies is compared. The retrograde n-well structures are shown to have superior latchup immunity, due primarily to the reduced n-well sheet resistance and the greater tolerance to thin p on p <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> epitaxial material.