Demonstration of non-volatile working memory through interface engineering in STT-MRAM

Abstract

We engineered the interface of the MgO barrier prepared by post-oxidation of Mg metal to improve structural and electronic properties of magnetic tunnel junctions (MTJs). Drastic improvements in magnetoresistance ratio (MR) and switching voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">c</sub> ) with low resistance area product (RA) were achieved by inserting CoFe seed layer under the oxidized barrier. The MTJ satisfied over 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">16</sup> write cycles at 10 ns pulse under the operation voltage of 0.65 V. From these results, we have verified for the first time the hypothesis that a spin transfer torque magnetoresistance random access memory (STT-MRAM) is suitable for a non-volatile working memory.