Capacitance Modeling and Characterization of Planar MOSCAP Devices for Wideband-Gap Semiconductors With High-$\kappa$ Dielectrics

Abstract

This paper presents a capacitance model and mobility extraction method through the use of tapered transmission line theory for accumulation-mode MOSCAP test structures. The analytical model accounts for the discrepancies commonly found when measuring the capacitance of nontraditional MOSCAP architectures. Through fabrication of a planar MOSCAP, this model accurately reproduced consistent capacitance density measurements for several device dimensions and high-κ dielectric thicknesses. In this paper, the theoretical basis of the model extracts the effective electron mobility of the accumulation channel in the semiconductor without fabricating a transistor.