1993 · 36 citations · 5 references
EngineeringComputer EngineeringComputer ScienceField-programmable Gate ArraysPerformance MeasurementReconfigurable ComputingField-programmable Gate Array ArchitectureFpga ArchitectureLookup TablesPerformance EvaluationField-programmable Gate Arrays (Fpgas)Lookup Table ArchitecturesLookup Table DesignLut ArchitectureTechnology Mapping To Logic Blocks
Article Performance directed technology mapping for look-up table based FPGAs Share on Authors: Prashant Sawkar View Profile , Donald Thomas View Profile Authors Info & Claims DAC '93: Proceedings of the 30th international Design Automation ConferenceJuly 1993 Pages 208–212https://doi.org/10.1145/157485.164672Published:01 July 1993 28citation199DownloadsMetricsTotal Citations28Total Downloads199Last 12 Months0Last 6 weeks0 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteGet Access
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Performance directed synthesis for table look up programmable gate arrays
Rajeev Murgai, Narendra Shenoy, Robert K. Brayton et al. · 2002 · 114 citations