Design of a Robust Analog-to-Digital Converter Based on Complementary SET/CMOS Hybrid Amplifier

Choong Hyun Lee, Se Woon Kim, Jang Uk Lee, Seung Hwan Seo, Gu-Cheol Kang, Kang Sup Roh, Kwan Young Kim, Soon Young Lee, Dong Myong Kim, Dae Hwan Kim

IEEE Transactions on Nanotechnology · 2007 · 13 citations · 13 references

Concepts

Abstract

As a solution to the high speed, ultralow power, and extremely compact ADC circuit block, a complementary single-electron transistor (SET)/CMOS hybrid amplifier-based analog-to-digital converter (ADC) is proposed. It is implemented with a physics-based SPICE model including nonideal effects in real Si-based SET <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">s</sub> such as the tunnel barrier lowering effect, parasitic MOSFET <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">s</sub> operation, and the phase shift of Coulomb oscillation by the bias of a gate other than a main control gate. Its core scheme is the combination of both the amplification of SET current by MOSFET <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">s</sub> and the suppression of a Coulomb blockade oscillation valley current by the differential amplification. In addition, the transient operation of SET/CMOS hybrid circuit-based ADC <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">s</sub> fully accounting for nonideal effects of real SET <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">s</sub> is successfully demonstrated for the first time. Compared with the previous SET-based ADC <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">s</sub> , our ADC makes features of the immunity to nonideal effects, large voltage swing of the output signal, and high load drivability.

References

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