2007 · 160 citations · 3 references
Hardware SecurityNon-volatile MemoryElectrical EngineeringEngineeringVlsi DesignPhysicsHigh-density Subthreshold SramComputer EngineeringComputer ArchitectureSram Test ChipVirtual-ground Replica SchemeSemiconductor MemoryMicroelectronicsData-independent Bitline LeakageMemory Architecture
A 10T SRAM cell with data-independent bitline leakage and a virtual-ground replica scheme allows 1k cells per bitline in subthreshold SRAMs. Reverse short-channel effect is used to improve writability, offer higher speed, reduce junction capacitance, and decrease circuit variability. A 0.13mum, the 480kb SRAM test chip shows a minimum operating voltage of 0.20V.
3
Stable SRAM cell design for the 32 nm node and beyond
L. Chang, David Fried, J. M. Hergenrother et al. · 2005 · 564 citations
Low-power Electronics, Non-volatile Memory, Electrical Engineering +12