Si nanowire growth and characterization using a microelectronics-compatible catalyst: PtSi

Abstract

Crystalline Si nanowires have been grown using a microelectronics-friendly solid-phase catalyst (PtSi) by chemical vapor deposition. Tapered growth occurs at high deposition temperatures (>700°C) due to uncatalyzed Si deposition at wire sidewalls, but this effect can be reduced at lower T (<600°C), while still maintaining reasonable growth rates (1μm∕h). Electrical testing of individual nanowires using conductive atomic force microscopy on as-grown samples demonstrates that wires are conducting with intrinsic resistivities in the 10–50Ωcm range.