IEEE Journal of Solid-State Circuits · 2004 · 33 citations · 8 references
EngineeringComputer EngineeringElectrical EngineeringAnalog ElectronicsMicroelectronicsWireless CommunicationsActive FiltersCmos Circuit DesignComplementary Metal-oxide-semiconductor TechnologyMixed-signal Integrated Circuit DesignPower AmplifiersRadio-frequency Integrated CircuitsAnalog Amplifier DesignCmos Analog Circuit DesignCmos Analog Integrated CircuitsCutoff FrequencyOffset CancellationRf Cmos DesignTransceiver ArchitecturesTransceiver Design
A dual-mode transceiver integrates the transmitter of 0-dBm output power and the receiver for both Bluetooth with -87 dBm sensitivity and 802.11b with -86 dBm sensitivity in a single chip. A direct-conversion architecture enables the maximum reuse and the optimal current consumption of the various building blocks in each mode for a low-cost and low-power solution. A single-ended power-amplifer (PA) driver transmits the nominal output power of 0 dBm with 18-dB gain control in 3-dB steps. Only little area overhead is required in the baseband active filter and programmable gain amplifier (PGA) to provide the dual-mode capability with optimized current consumption. The DC-offset cancellation scheme coupled with PGAs implements the very low high-pass cutoff frequency with a smaller area than required by a simple coupling capacitor. Fabricated in 0.25-/spl mu/m CMOS process, the die area is 8.4 mm/sup 2/ including pads, and current consumption in RX is 50 mA for Bluetooth and 65 mA for 802.11b from a 2.7-V supply.
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Yido Koo, Hyungki Huh, Yong-Sik Cho et al. · IEEE Journal of Solid-State Circuits · 2002 · 90 citations
Engineering, Computer Engineering, Electrical Engineering +17