IEEE Journal of Solid-State Circuits · 2003 · 67 citations · 7 references
EngineeringElectrical EngineeringAnalog ElectronicsLow-power DesignMicrowave EngineeringCmos Circuit DesignLow-noise Circuit DesignMicrowave Integrated CircuitsMillimeter-wave CommunicationsMixed-signal Integrated Circuit DesignRadio-frequency Integrated CircuitsCmos Analog Circuit DesignCmos Analog Integrated CircuitsCmos Radio-frequency CircuitsGain ControlMaximum Power OutputMixersNoise FigurePower Consumption
This paper presents a full-CMOS transmitter and receiver for 2.0-GHz wide-band code division multiple access with direct conversion mixers and a DC-offset cancellation scheme. The direct conversion scheme combined with a multiphase sampling fractional-N prescaler alleviates the problems of the direct conversion transmitter and receiver. Digital gain control is merged into the baseband filters and variable-gain amplifiers to optimize the linearity of the system, reduce the noise, and improve the sensitivity. Variable-gain amplifiers with DC-offset cancellation loop eliminate the DC-offset in each stage. The chip implemented in 0.35-μm CMOS technology shows the experimental results of 6 dBm maximum output power with 38-dB adjacent channel power rejection ratio at 1.92 MHz, 50-dB dynamic range, and 363-mW power consumption in the transmitter. The receiver shows -115.4 dBm sensitivity, a 4.0-dB noise figure, and a dynamic range of 80-dB with 396-mW power consumption.
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