IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications · 2007 · 21 citations · 15 references
EngineeringElectrical EngineeringAnalog ElectronicsMicroelectronicsSemiconductor DevicesAnalog Integrated CircuitsCmos Circuit DesignDevice ReliabilityIntegrated Circuit DesignMixed-signal Integrated Circuit DesignTransistor BiasingAnalog Circuit DesignClass-ab Output StageCmos Analog Circuit DesignCmos Analog Integrated CircuitsDigital-to-analog Converter DesignLevel Shifter DesignOperational Amplifier CircuitsOperational Amplifier Design
Electrical stress-relieved analog circuit design techniques using only baseline devices are presented, 1-to-2 logic level shifter, optional diode insertion, and adaptive biasing scheme are introduced to meet a reliability guideline that ensures sufficient lifetime. The proposed idea was successfully demonstrated with 12-bit <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I/Q</i> digital-to-analog converter (DAC) and an operational amplifier having a Classs-AB output stage in 65-nm n-well CMOS technology and a high temperature operating life (HTOL) test was performed to evaluate the reliability of the design.
15
Analysis and Design of Analog Integrated Circuits
W.R. Betts · Electronics and Power · 1978 · 3.8K citations
Gate oxide scaling limits and projection
Chenming Hu · 2002 · 152 citations
Engineering, Electrical Engineering, Electronic Materials +16