Optimal Termination of On-Chip Transmission-Lines for High-Speed Signaling

A. Tsuchiya, Masanori Hashimoto, Hidetaka Onodera

IEICE Transactions on Electronics · 2007 · 14 citations · 4 references

Concepts

Abstract

This paper discusses the resistive termination of on-chip high-performance interconnects. Resistive termination is effective to improve the bandwidth of on-chip interconnects, on the other hands, increases the power dissipation and the area. Therefore trade-off analysis about resistive termination is necessary. This paper proposes a method to determine the termination of on-chip interconnects. The termination derived by the proposed method provides minimum sensitivity to process variation as well as maximum eye-opening in voltage.

References

4