A 56.4-to-63.4GHz spurious-free all-digital fractional-N PLL in 65nm CMOS

Abstract

Frequency synthesis at mm-Waves is still dominated by analog PLLs, although all-digital PLLs (ADPLLs) [1] have been widely explored below 10GHz. The major obstacle has been the poor quality of digitally controlled oscillators (DCO) as MOS varactor Q-factor drops to <;10 at 60GHz. A mm-Wave digital transmitter (TX) based on a 60GHz fractional-N ADPLL with two-point FM is proposed here. The TX features extensive reconfigurability and permits the highest degree of integration of RF and baseband circuitry for low-cost, high-volume applications. To simplify the TX architecture, the synthesizer is capable of FM, hence a time-to-digital converter (TDC) is preferred over bang-bang phase detection. With the aid of autonomous calibrations of DCO and TDC gain, wideband two-point FM is achieved.