Wanghua Wu

A 28-nm 75-fs_rms Analog Fractional-$N$ Sampling PLL With a Highly Linear DTC Incorporating Background DTC Gain Calibration and Reference Clock Duty Cycle Correction

Wanghua Wu, Chih-Wei Yao, Kunal Godbole et al. · IEEE Journal of Solid-State Circuits · 2019 · 192 citations

Engineering, Electrical Engineering, Analog Electronics +16

A 56.4-to-63.4 GHz Multi-Rate All-Digital Fractional-N PLL for FMCW Radar Applications in 65 nm CMOS

Wanghua Wu, Robert Bogdan Staszewski, John R. Long · IEEE Journal of Solid-State Circuits · 2014 · 182 citations · Full text

Engineering, Electrical Engineering, Analog Electronics +16

A 14-nm Ultra-Low Jitter Fractional-<i>N</i> PLL Using a DTC Range Reduction Technique and a Reconfigurable Dual-Core VCO

Wanghua Wu, Chih-Wei Yao, Chengkai Guo et al. · IEEE Journal of Solid-State Circuits · 2021 · 133 citations

Engineering, Electrical Engineering, Analog Electronics +16

9.6 A 2.7-to-4.3GHz, 0.16psrms-jitter, −246.8dB-FOM, digital fractional-N sampling PLL in 28nm CMOS

Xiang Gao, O. Burg, Haisong Wang et al. · 2016 · 98 citations

Engineering, Computer Engineering, Electrical Engineering +16

High-Resolution Millimeter-Wave Digitally Controlled Oscillators With Reconfigurable Passive Resonators

Wanghua Wu, John R. Long, Robert Bogdan Staszewski · IEEE Journal of Solid-State Circuits · 2013 · 83 citations

Engineering, Electrical Engineering, Analog Electronics +16