A Low Noise Sub-Sampling PLL in Which Divider Noise is Eliminated and PD/CP Noise is Not Multiplied by $N ^{2}$

Xiang Gao, Eric A.M. Klumperink, Mounir Bohsali, +1

IEEE Journal of Solid-State Circuits

Classical PllSampling (Signal Processing)EngineeringClock RecoverySub-sampling Pll +10

Jitter Analysis and a Benchmarking Figure-of-Merit for Phase-Locked Loops

Xiang Gao, Eric A.M. Klumperink, Paul Geraedts, +1

IEEE Transactions on Circuits & Systems II Express Briefs

Benchmark FomElectrical EngineeringEngineeringOscillatorsClock Recovery +10

Designing 3d dual transition metal electrocatalysts for oxygen evolution reaction in alkaline electrolyte: Beyond oxides

Kexin Wang, Xinyue Wang, Zhongjian Li, +8

Nano Energy

Materials ScienceOxygen Reduction ReactionEngineeringAlkaline ElectrolyteSurface Electrochemistry +6

Waterborne polyurethane and its nanocomposites: a mini-review for anti-corrosion coating, flame retardancy, and biomedical applications

Jianchen Cai, Vignesh Murugadoss, Jinyun Jiang, +7

Advanced Composites and Hybrid Materials

Materials ScienceEngineeringCorrosionFlame RetardancySurface Modification +7

Technical Perspective of Carbon Capture, Utilization, and Storage

Qingyang Lin, Xiao Zhang, Tao Wang, +2

Engineering

A General Approach Towards Thermoplastic Multishape‐Memory Polymers via Sequence Structure Design

Yingwu Luo, Yunlong Guo, Xiang Gao, +2

Advanced Materials

Attractive Pickering Emulsion Gels

Baiheng Wu, Chenjing Yang, Xin Qi, +9

Advanced Materials

Spur Reduction Techniques for Phase-Locked Loops Exploiting A Sub-Sampling Phase Detector

Xiang Gao, Eric A.M. Klumperink, Gerard Socci, +2

IEEE Journal of Solid-State Circuits

Isolation BuffersSpur Reduction TechniquesSampling (Signal Processing)EngineeringVlsi Design +13

Piezo robotic hand for motion manipulation from micro to macro

Shijing Zhang, Yingxiang Liu, Jie Deng, +9

Nature Communications

Robot KinematicsRobotic SystemsEngineeringMultiple DegreesDexterous Manipulation +21

9.6 A 2.7-to-4.3GHz, 0.16psrms-jitter, −246.8dB-FOM, digital fractional-N sampling PLL in 28nm CMOS

Xiang Gao, O. Burg, Haisong Wang, +9

EngineeringClock RecoverySub-sampling PllData ConverterRms Jitter +6