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Extendibility of NiPt Silicide Contacts for CMOS Technology Demonstrated to the 22-nm Node
19
Citations
3
References
2007
Year
Unknown Venue
Cmos Technology RequirementsEngineeringSilicon On InsulatorUltra-low Contact ResistivitiesInterconnect (Integrated Circuits)NanoelectronicsSiliceneNipt SilicideElectrical EngineeringPhysicsSemiconductor Device FabricationMicroelectronicsCmos Technology Demonstrated22-Nm NodeNatural SciencesParticle PhysicsApplied PhysicsNipt Silicide ContactsOptoelectronicsBeyond Cmos
This paper shows ultra-low contact resistivities with standard NiPt silicide process that can reach below 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-8</sup> Omega-cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> for both n <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> and p <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> Si and demonstrates that NiPt silicide can fulfill CMOS technology requirements down to the ITRS 22 nm node.
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