Publication | Closed Access
Challenges in thin wafer handling and processing
15
Citations
1
References
2013
Year
Unknown Venue
Advanced Packaging3D Ic ArchitectureChip-scale PackageEngineeringAdvanced Packaging (Semiconductors)Wafer Scale ProcessingMicrofabricationThree-dimensional Heterogeneous IntegrationMechanical EngineeringThin WafersChip AttachmentIntegrated CircuitsPackaging TechnologiesElectronic PackagingMicroelectronicsRigid Carrier WafersThin Wafer Handling3D Printing
Through-silicon via (TSV)-based 3D packaging technologies require processing and handling of silicon wafers thinned to 50 μm and below. A number of manufacturing challenges exist for these processes. When wafers are this thin, an external means of mechanical support is always required. This support may be provided from specially designed chucks, rigid carrier wafers, dicing tape or the final package. Using rigid carrier wafers and a temporary bonding process allows the thin wafers to be processed in regular semiconductor tooling. The number of processes available for temporary bonding as well as the variety of integration flows adds complication to process development in the area. Furthermore, these processing steps require some restructuring of the current semiconductor supply chain.
| Year | Citations | |
|---|---|---|
Page 1
Page 1