IEEE Journal of Solid-State Circuits · 2002 · 24 citations · 25 references
EngineeringComputer EngineeringElectrical EngineeringLow-power DesignMicroelectronicsSemiconductor DevicesCmos Circuit DesignElectrostatic Discharge ProtectionIntegrated Circuit DesignElectrostatic DischargeGate Oxide LeakageGate Oxide ReliabilityHuman Body ModelsOn-chip Electrostatic Discharge ProtectionOxide ReliabilitySilicon Controlled Rectifier Protection StructuresSilicon Controlled Rectifier Triggering
A new electrostatic discharge (ESD) protection circuit, using the stacked-nMOS triggered silicon controlled rectifier (SNTSCR) as the ESD clamp device, is designed to protect the mixed-voltage I/O buffers of CMOS ICs. The new proposed ESD protection circuit, which combines the stacked-nMOS structure with the gate-coupling circuit technique into the SCR device, is fully compatible to general CMOS processes without causing the gate-oxide reliability problem. Without using the thick gate oxide, the experimental results in a 0.35 /spl mu/m CMOS process have proven that the human-body-model ESD level of the mixed-voltage I/O buffer can be successfully increased from the original /spl sim/2 kV to >8 kV by using this proposed ESD protection circuit.
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