Probing nanoscale local lattice strains in advanced Si complementary metal-oxide-semiconductor devices

Abstract

Local lattice strains in nanoscale Si complementary metal-oxide-semiconductor (MOS) transistors are directly measured by convergent beam electron diffraction (CBED). Through both high spatial resolution and high strain sensitivity of the CBED technique, compressive strains on the order of 10−3 from a p-type MOS transistor with a sub-100nm gate length are detected. One-dimensional quantitative strain mapping is demonstrated. The tensile strains from a ⟨100⟩ channel n-type MOS transistor are observed at the ⟨910⟩ zone axis. It is found that the strain increases with the thickness of the silicon nitride-capping layer, which is consistent with the device’s electrical behavior.