Direct comparison of electrical performance of 0.1-μm pMOSFETs doped by plasma doping or low energy ion implantation

Abstract

The fabrication of ultra-shallow junctions (USJ) is becoming one of the most challenging tasks for advanced CMOS technology. We experimentally show the limits of the standard ion implantation technique. Then, we demonstrate the benefit induced by the use of the low biased PLAsma Doping (PLAD) processes to fabricate USJ. Next, we have fabricated deep sub-micrometer pMOSFETs. The measured electrical results show that the basic device performance is improved when the source/drain extensions are plasma doped instead of the standard BF/sub 2//sup +/ implantation. We attribute this improvement to a better control of the lateral spread of the extensions under the gate. This characteristic is directly correlated to the strong reduction of the junction depth when the PLAD technique is used.