Using NoC routers as processing elements

Abstract

The integration technology has increased at the point where the development of Multi-Core processor architectures is a market reality nowadays. In this scenario, the interconnection network has a critical function when the number of cores increases, becoming impossible to use bus-based solutions. This paper approaches this problem with a new NoC-based architecture and a new computation mode. It proposes the utilization of network-onchip not only as an interconnection network but as well the processing datapath, which has great power of parallelism.