Design Automation Conference · 1978 · 15 citations · 6 references
EngineeringComputer EngineeringComputer ScienceFault-tolerant ComputingFault-tolerant SystemsSystems ModelingDesign For TestabilityDigital Logic DesignFault ModelingHardware Modeling For Digital SystemsLogic SynthesisSystem SimulationFault SimulationHardware Fault ModelsLogic VerificationSimulation-based VerificationSystem VerilogSystem-level ModelingSystem-level SimulationVerification Of Integrated Circuits
This paper describes newly developed techniques suitable for logic verification and fault simulation of digital systems which are mainly composed of LSI's and MSI's. A simulator employing such techniques has been implemented, and has shown definite advantages over existing simulators.
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Concurrent simulation of nearly identical digital networks
Exclusive simulation of activity in digital networks
Ernst G. Ulrich · Communications of the ACM · 1969 · 116 citations · Full text
Functional simulation in the lamp system
S.G. Chappell, P.R. Menon, J. Pellegrin et al. · 1976 · 42 citations