GaAs FET characterization in a quasi-monolithic Si environment

Abstract

GaAs FET chips are planar embedded in a high resistivity silicon substrate and characterized up to 40 GHz in a coplanar environment. Hybrid interconnects (bonding wires) are replaced by thin film ones (air bridges). Small signal equivalent circuit extraction results confirm the expected low parasitic inductance values. These are reduced by more than 50% of the typical bonding wire interconnects.