Direct Evidence of the Overshoot Suppression in Ta<sub>2</sub>O<sub>5</sub>-Based Resistive Switching Memory With an Integrated Access Resistor

Abstract

We demonstrate suppression of the overshoot current effect on a resistive random access memory device with a TiN/Ta <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">5</sub> /TaO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> /TaN/TiN stack structure. Using test structures with an integrated 5-kΩ series resistor, a nearly 1:1 relation between the compliance current and the first maximum reset current has been achieved, together with an opening of the ON/OFF resistance window to over 100. Besides, the cell size also plays an important role on overshoot suppression, which we relate to the effect of the device self-capacitance discharge during the set switching. According to the experimental results, a simple model for the access circuitry is proposed, which is able to explain well the overshoot impact, by identifying the main capacitance discharge loops during device operation.