1987 · 10 citations · 8 references
EngineeringComputer EngineeringElectrical EngineeringComputer ArchitectureMicroelectronicsSystem-on-chip DesignCachingMemory Hierarchy DesignMemory Subsystem DesignMicroarchitecture DesignProcessor Core DesignProcessor MicroarchitectureCache ArchitectureCache DesignCache Memory DesignCache PrefetchingPipeline ArchitecturePipeline DesignPipelined MemoryReduced Instruction Set Computing
A Reduced Instruction Set Computer containing 172K transistors in 1.5μm technology will be described. The chip contains caches for prefetch buffer, decoded instructions and stack. Two internal machines with three pipelined stages are used.
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