High-speed compact circuits with CMOS

TLDR

Various CMOS and NMOS circuit techniques have been studied, but each has notable shortcomings. The authors introduce a CMOS domino circuit that connects dynamic CMOS gates so a single clock edge activates all gates simultaneously. The domino circuit eliminates complex clocking, exploits full dynamic gate speed, and yields 1.5–2× speed gains in 8‑bit ALUs and sub‑100‑ns worst‑case addition in 32‑bit ALUs.

Abstract

Characteristics of various CMOS and NMOS circuit techniques are described, along with the shortcomings of each. Then a new circuit type, the CMOS domino circuit is described. This involves the connection of dynamic CMOS gates in such a way that a single clock edge can be used to turn on all gates in the circuit at once. As a result, complex clocking schemes are not needed and the full inherent speed of the dynamic gate can be utilized. The circuit is most valuable where gates are complex and have high fan-out such as in arithmetic units. Examples are shown of the use of domino circuits in an 8-bit ALU, where simulations indicate a speed advantage of 1.5 to 2 over traditional circuits, and in a 32-bit ALU where a worst case add in 124 ns was projected and a time less than 100 ns was achieved.