Design and Analysis of Resonant-Tunneling-Diode (RTD) Based High Performance Memory System

Abstract

SUMMARY A resonant-tunneling-diode (RTD) based sense amplifier circuit design has been proposed for the first time to envision a veryhigh-speed and low-power memorysy stem that also includes refresh-free, compact RTD-based memorycells. By combining RTDs with n-type transistors of conventional complementarymetal oxide semiconductor (CMOS) devices, a new quantum MOS (Q-MOS) familyof logic circuits, having verylow power-delayproduct and good noise immunity , has recentlybeen developed. This paper introduces the design and analysis of a new QMOS sense amplifier circuit, consisting of a pair of RTDs as pull-up loads in conjunction with n-type pull-down transistors. The proposed QMOS sensing circuit exhibits nearly20% faster sensing time in comparison to the conventional design of a CMOS sense amplifier. The stabilityanaly sis done using phase-plot diagram reveals that the pair of back-to-back connected static QMOS inverters, which forms the core of the sense amplifier, has meta-stable and unstable states which are closelyrelated to the I-V characteristics of the RTDs. The paper also analyzes in details the refresh-free memorycell design, known as tunneling static random access memory(TSRAM). The innovative cell design adds a stack of two RTDs to the conventional one-transistor dynamic RAM (DRAM) cell and thereby the cell can indefinitely hold its charge level without anyfurther periodic refreshing. The analysis indicates that the TSRAM cell can achieve about two orders of magnitude lower stand-bypower than a conventional DRAM cell. The paper demonstrates that RTD-based circuits hold high promises and are likelyto be the keycandidates for the future high-density, high-performance and low-power memorysy stems.