Implant damage and gate-oxide-edge effects on product reliability

Abstract

This work investigated the effects of thin-gate oxide edge damage on logic product reliability. For this, we used different poly profiles to quantify the thin-gate oxide edge damage. Device/Process simulation was also conducted to explain the interaction of implant and poly shape with the gate oxide reliability. Poly with foot showed degraded oxide reliability, because it allows high-energy implant to penetrate through the edge of the gate oxide causing oxide damage and hence failures during product burn-in. The problem is more pronounced on nMOST due to its stronger sensitivity to the voltage stress and the specific implant species as compared to pMOST. Circuit simulation was also conducted to characterize the circuit sensitivity on oxide leakage and to explain the observed product burn-in fallout.